CD54HC4002, CD74HC4002
Data sheet acquired from Harris Semiconductor SCHS197E
August 1997 - Revised October 2003
High-...
CD54HC4002, CD74HC4002
Data sheet acquired from Harris Semiconductor SCHS197E
August 1997 - Revised October 2003
High-Speed
CMOS Logic Dual 4-Input NOR Gate
[ /Title (CD74H C4002) /Subject (High Speed
CMOS Logic Dual 4Input NOR Gate)
Features
Description
Typical Propagation Delay CL = 15pF, TA = 25oC
=
8ns
at
VCC
=
5V,
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V
The ’HC4002 logic gate utilizes silicon gate
CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard
CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The ’HC4002 logic family is functional as well as pin compatible with the standard LS logic family.
Ordering Information
PART NUMBER CD54HC4002F3A CD74HC4002E CD74HC4002M CD74HC4002MT CD74HC4002M96
TEMP. RANGE (oC)
-55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125
PACKAGE 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC 14 Ld SOIC
CD74HC4002NSR
-55 to 125
14 Ld SOP
CD74HC4002PW
-55 to 125
14 Ld TSSOP
CD74HC4002PWR
-55 to 125
14 Ld TSSOP
CD74HC4002PWT
-55 to 125
14 Ld TSSOP
NOTE: Wh...