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C9851 Datasheet

Part Number C9851
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description Clock Generator
Datasheet C9851 DatasheetC9851 Datasheet (PDF)

www.DataSheet4U.com PRELIMINARY C9851 Clock Generator for PentiumIII Server and Workstation Applications Product Features • • • • • • • Six pairs of current referenced differential clocks Two 3V 180° displaced Mref clocks for DRCG One 66.6 MHz reference output One 14.318 MHz reference output Select logic for Differential Swing Control, Test mode, Hi-Z, Power-down, Spread spectrum, and limited frequency select Cypress Spread Spectrum for EMI reduction 48 Pin SSOP Package Product Description .

  C9851   C9851






Clock Generator

www.DataSheet4U.com PRELIMINARY C9851 Clock Generator for PentiumIII Server and Workstation Applications Product Features • • • • • • • Six pairs of current referenced differential clocks Two 3V 180° displaced Mref clocks for DRCG One 66.6 MHz reference output One 14.318 MHz reference output Select logic for Differential Swing Control, Test mode, Hi-Z, Power-down, Spread spectrum, and limited frequency select Cypress Spread Spectrum for EMI reduction 48 Pin SSOP Package Product Description This device provides the necessary clocks for a differential host bus system in multi-processor servers and workstations. It also generates a 66.6MHz hub clock for interfacing with a complimentary part, the Cypress B9852. The 2 Mref clock outputs are 180 degrees out of phase and are used for interfacing with the Direct Rambus Clock Generator (DRCG), C9820, C9821, or C9822. This device integrates the Cypress spread spectrum technology for optimum EMI reduction. Frequency Selection Table SEL 100/133 0 0 0 0 1 1 1 1 SELA 0 0 1 1 0 0 1 1 SELB 0 1 0 1 0 1 0 1 CPU(1:6), CPU#(1:6) 100 MHz 100 MHz 200 MHz Hi-Z 133.3 MHz 25 MHz 200 MHz REF/2 3VMref, 3Vmref_b 50 MHz Low 50 MHz Hi-Z 66.67 MHz 50 MHz 66.7 MHz REF/4 Table 1 3V66 66.67 MHz Low 66.67 MHz Hi-Z 66.67 MHz 66.67 MHz 66.67 MHz REF REF 14.318 MHz Low 14.318 MHz Hi-Z 14.318 MHz 14.318 MHz 14.318 MHz REF Block Diagram Pin Configuration VDDR REF VSSR VDDA MultSel(0:1) Spread# SelA SelB SEL100/133 I Control XIN XOUT OSC I_Ref VSSI CPU (1:.


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