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BUK566-60A Datasheet

Part Number BUK566-60A
Manufacturers NXP
Logo NXP
Description PowerMOS transistor Logic level FET
Datasheet BUK566-60A DatasheetBUK566-60A Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in automotive and general purpose switching applications. BUK566-60A QUICK REFERENCE DATA SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-sou.

  BUK566-60A   BUK566-60A






Part Number BUK566-60H
Manufacturers NXP
Logo NXP
Description PowerMOS transistor Logic level FET
Datasheet BUK566-60A DatasheetBUK566-60H Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in automotive and general purpose switching applications. BUK566-60H QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-s.

  BUK566-60A   BUK566-60A







PowerMOS transistor Logic level FET

Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in automotive and general purpose switching applications. BUK566-60A QUICK REFERENCE DATA SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance VGS = 5 V MAX. 60 50 150 26 UNIT V A W mΩ PINNING - SOT404 PIN 1 2 3 mb gate drain source drain DESCRIPTION PIN CONFIGURATION mb SYMBOL d g 2 1 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 kΩ tp ≤ 50 µs Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 60 60 15 20 50 38 200 150 175 175 UNIT V V V V A A A W ˚C ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. minimum footprint, FR4 boards (see. Fig 18). TYP. 50 MAX. 1.0 UN.


2005-03-23 : 2N2857CSM    2N2880    2N2891    2N2894    2N2894    2N2894    2N2894A    2N2894ACSM    2N2894CSM    2N2894DCSM   


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