BU1923

Audio ICs RDS / RBDS decoder BU1923 / BU1923F The BU1923 and BU1923F are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter and an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption. FApplications RDS / RBDS compatible FM receivers for American and European markets, car stereos, high-fidelity stereo systems and components, and FM pagers. FFeatures 1) Low current. 2) Two-stage anti-aliasing filter (LPF). 3) 57kHz band-pass filter. FAbsolute maximum ratings (Ta = 25_C) 4) DSB demodulation (digital PLL). 5) Quality indication output for demodulated data. FRecommended operating conditions (Ta = 25_C) 828 Audio ICs FBlock diagram BU1923 / BU1923F 829 Audio ICs FPin descriptions BU1923 / BU1923F FInput / output circuits 830 Audio ICs BU1923 / BU1923F FElectrical characteristics (unless otherwise noted, Ta = 25_C, VDD1 = VDD2 = 5.0V, VSS1 = VSS2 = 0.0V) 831 Audio ICs FOutput data timing BU1923 / BU1923F The clock (RCLK) frequency is 1187.5Hz. Depending on the state of the internal PLL clock, the data (RDATA) is replaced in synchronous with either the rising or falling edge of the clock. To read the data, you may choose ei- ther the rising or falling edge of the clock as the reference. The data is valid for 416.7µs. after the reference clock edge. QUAL pin operation: Indicates the quality of the demodulated data. (1) Good data: HI (2) Poor data: LO FElectrical characteristic cu...