AZ100EL31

www.DataSheet4U.com ARIZONA MICROTEK, INC. AZ10EL31 AZ100EL31 ECL/PECL D Flip-Flop with Set and Reset FEATURES 475ps Propagation Delay 2.8GHz Toggle Frequency 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10EL31 & MC100EL31 PACKAGE AVAILABILITY PACKAGE SOIC 8 SOIC 8 T&R SOIC 8 T&R SOIC 8 SOIC 8 T&R SOIC 8 T&R TSSOP 8 TSSOP 8 T&R TSSOP 8 T&R TSSOP 8 TSSOP 8 T&R TSSOP 8 T&R PART NO. AZ10EL31D AZ10EL31DR1 AZ10EL31DR2 AZ100EL31D AZ100EL31DR1 AZ100EL31DR2 AZ10EL31T AZ10EL31TR1 AZ10EL31TR2 AZ100EL31T AZ100EL31TR1 AZ100EL31TR2 MARKING AZM10EL31 AZM10EL31 AZM10EL31 AZM100EL31 AZM100EL31 AZM100EL31 AZTEL31 AZTEL31 AZTEL31 AZHEL31 AZHEL31 AZHEL31 DESCRIPTION The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally suited for those applications that require the ultimate in AC performance. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master section of the flipflop when the clock is LOW. When the clock transitions from LOW to HIGH, the data in the master section transfers into the slave section and through to the outputs. NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established. TRUTH TABLE LOGIC DIAGRAM AND PINOUT ASSIGNMENT D L H X X X S* L L H L H R* L L L H H...