AX88195P

AX88195P 10/100BASE Fast Ethernet MAC Controller 10/100BASE Local CPU Bus Fast Ethernet MAC Controller Features Document No.: AX195-17 / V1.7 / May. 12 ’00 IEEE 802.3u 100BASE-T, TX, and T4 Compatible Single chip local CPU bus 10/100Mbps Fast Ethernet MAC Controller NE2000 register level compatible instruction Support both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series and MC68K series CPU Support both 10Mbps and 100Mbps data rate Support both full-duplex or half-duplex operation Provides a MII port for both 10/100Mbps operation Support EEPROM interface to store MAC address External and internal loop-back capability Two external 32K*8 Asynchronous SRAMs required for packet buffer 128-pin LQFP low profile package 25MHz Operation, Dual 5V and 3.3V CMOS process with 5V I/O tolerance. Or pure 3.3V operation *IEEE is a registered trademark of the Institute of Electrical and Electronic Engineers, Inc. *All other...