AT45DB642D

Features Single 2.7V - 3.6V Supply Dual-interface Architecture – RapidS Serial Interface: 66 MHz Maximum Clock Frequency SPI Compatible Modes 0 and 3 – Rapid8 8-bit Interface: 50 MHz Maximum Clock Frequency User Configurable Page Size – 1024 Bytes per Page – 1056 Bytes per Page – Page Size Can Be Factory Pre-configured for 1024 Bytes Page Program Operation – Intelligent Programming Operation – 8192 Pages (1024/1056 Bytes/Page) Main Memory Flexible Erase Options – Page Erase (1 Kbyte) – Block Erase (8 Kbytes) – Sector Erase (256 Kbytes) – Chip Erase (64 Mbits) Two SRAM Data Buffers (1024/1056 Bytes) – Allows Receiving of Data while Reprogramming the Flash Array Continuous Read Capability through Entire Array – Ideal for Code Shadowing Applications Low-power Dissipation – 10 mA Active Read Current Typical – Serial Interface – 10 mA Active Read Current Typical – 8-bit Interface – 25 µA Standby Current Typical – 15 µA ...