July 2005 rev 0.2 Low Voltage Zero Delay Buffer
Features
Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance
ASM5I961P
reference clock while the ASM5I961P offers an LVPECL reference clock. When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance state. Because the OE p...
