ADC08D502
www.ti.com
SNOSC85A – AUGUST 2012 – REVISED APRIL 2013
ADC08D502 High Performance, Low Power, Dual 8-Bit, 5...
ADC08D502
www.ti.com
SNOSC85A – AUGUST 2012 – REVISED APRIL 2013
ADC08D502 High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter
Check for Samples: ADC08D502
FEATURES
1
2 Internal Sample-and-Hold Single +1.9V ±0.1V Operation Choice of SDR or DDR Output Clocking Multiple ADC Synchronization Capability Specified No Missing Codes Serial Interface for Extended Control Fine Adjustment of Input Full-Scale Range and
Offset Duty Cycle Corrected Sample Clock
APPLICATIONS
Direct RF Down Conversion Digital Oscilloscopes Satellite Set-top boxes Communications Systems Test Instrumentation
KEY SPECIFICATIONS
Resolution: 8 Bits Max Conversion Rate: 500 MSPS (min) Bit Error Rate: 10-18 (typ) ENOB @ 250 MHz Input: 7.5 Bits (typ) DNL: ±0.15 LSB (typ) Power Consumption
– Operating: 1.4 W (typ) – Power Down Mode: 3.5 mW (typ)
DESCRIPTION
The ADC08D502 is a dual, low power, high performance
CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical 1.4 Watts at 500 MSPS from a single 1.9 Volt supply, this device is specified to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the selfcalibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with...