AD9255

Data Sheet 14-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter AD9255 FEATURES SNR = 78.3 dBFS at 70 MHz and 125 MSPS SFDR = 93 dBc at 70 MHz and 125 MSPS Low power: 371 mW at 125 MSPS 1.8 V analog supply operation 1.8 V CMOS or LVDS output supply Integer 1-to-8 input clock divider IF sampling frequencies to 300 MHz −153.4 dBm/Hz small signal input noise with 200 Ω input impedance at 70 MHz and 125 MSPS Optional on-chip dither Programmable internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range: 1 V p-p to 2 V p-p Differential analog inputs with 650 MHz bandwidth ADC clock duty cycle stabilizer Serial port control User-configurable, built-in self-test (BIST) capability Energy-saving power-down modes APPLICATIONS Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipment PRODUCT HIGHLIGHTS 1. On-chip dither option for improved SFDR performance with low power analog input. 2. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. 3. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. 4. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), ena...