DatasheetsPDF.com

AD9201 Datasheet

Part Number AD9201
Manufacturers Analog Devices
Logo Analog Devices
Description Dual Channel/ 20 MHz 10-Bit Resolution CMOS ADC
Datasheet AD9201 DatasheetAD9201 Datasheet (PDF)

a FEATURES Complete Dual Matching ADCs Low Power Dissipation: 215 mW (+3 V Supply) Single Supply: 2.7 V to 5.5 V Differential Nonlinearity Error: 0.4 LSB On-Chip Analog Input Buffers On-Chip Reference Signal-to-Noise Ratio: 57.8 dB Over Nine Effective Bits Spurious-Free Dynamic Range: –73 dB No Missing Codes Guaranteed 28-Lead SSOP Dual Channel, 20 MHz 10-Bit Resolution CMOS ADC AD9201 FUNCTIONAL BLOCK DIAGRAM AVDD IINA IINB IREFB IREFT QREFB QREFT VREF REFSENSE QINB QINA "Q" ADC Q REGISTER REF.

  AD9201   AD9201






Part Number AD9208
Manufacturers Analog Devices
Logo Analog Devices
Description Dual Analog-to-Digital Converter
Datasheet AD9201 DatasheetAD9208 Datasheet (PDF)

Data Sheet 14-Bit, 3 GSPS, JESD204B, Dual Analog-to-Digital Converter AD9208 FEATURES JESD204B (Subclass 1) coded serial digital outputs Support for lane rates up to 16 Gbps per lane 1.65 W total power per channel at 3 GSPS (default settings) Performance at −2 dBFS amplitude, 2.6 GHz input SFDR = 70 dBFS SNR = 57.2 dBFS Performance at −9 dBFS amplitude, 2.6 GHz input SFDR = 78 dBFS SNR = 59.5 dBFS Integrated input buffer Noise density = −152 dBFS/Hz 0.975 V, 1.9 V, and 2.5 V dc supply operatio.

  AD9201   AD9201







Part Number AD9207
Manufacturers Analog Devices
Logo Analog Devices
Description JESD204B/JESD204C Dual ADC
Datasheet AD9201 DatasheetAD9207 Datasheet (PDF)

Data Sheet AD9207 12-Bit, 6 GSPS, JESD204B/JESD204C Dual ADC FEATURES ► Flexible reconfigurable common platform design ► Supports single, dual, and quad band per channel ► Datapaths and DSP blocks are fully bypassable ► On-chip PLL with multichip synchronization ► External RFCLK input option for off-chip PLL ► Support clock input frequencies up to 12 GHz ► Maximum ADC sample rate up to 6 GSPS ► Useable analog bandwidth to 8 GHz ► Maximum data rate up to 6 GSPS using JESD204C ► Noise density: −1.

  AD9201   AD9201







Part Number AD9204
Manufacturers Analog Devices
Logo Analog Devices
Description 1.8V Dual Analog-to-Digital Converter
Datasheet AD9201 DatasheetAD9204 Datasheet (PDF)

Data Sheet 10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9204 08122-001 FEATURES 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR 61.3 dBFS at 9.7 MHz input 61.0 dBFS at 200 MHz input SFDR 75 dBc at 9.7 MHz input 73 dBc at 200 MHz input Low power 30 mW per channel at 20 MSPS 63 mW per channel at 80 MSPS Differential input with 700 MHz bandwidth On-chip voltage reference and sample-and-hold circuit DNL = ±0.11 LSB Serial port control options Sc.

  AD9201   AD9201







Part Number AD9203
Manufacturers Analog Devices
Logo Analog Devices
Description A/D Converter
Datasheet AD9201 DatasheetAD9203 Datasheet (PDF)

FEATURES CMOS 10-Bit, 40 MSPS sampling A/D converter Power dissipation: 74 mW (3 V supply, 40 MSPS) 17 mW (3 V supply, 5 MSPS) Operation between 2.7 V and 3.6 V supply Differential nonlinearity: −0.25 LSB Power-down (standby) mode, 0.65 mW ENOB: 9.55 @ fIN = 20 MHz Out-of-range indicator Adjustable on-chip voltage reference IF undersampling up to fIN = 130 MHz Input range: 1 V to 2 V p-p differential or single-ended Adjustable power consumption Internal clamp circuit APPLICATIONS CCD imaging Vid.

  AD9201   AD9201







Dual Channel/ 20 MHz 10-Bit Resolution CMOS ADC

a FEATURES Complete Dual Matching ADCs Low Power Dissipation: 215 mW (+3 V Supply) Single Supply: 2.7 V to 5.5 V Differential Nonlinearity Error: 0.4 LSB On-Chip Analog Input Buffers On-Chip Reference Signal-to-Noise Ratio: 57.8 dB Over Nine Effective Bits Spurious-Free Dynamic Range: –73 dB No Missing Codes Guaranteed 28-Lead SSOP Dual Channel, 20 MHz 10-Bit Resolution CMOS ADC AD9201 FUNCTIONAL BLOCK DIAGRAM AVDD IINA IINB IREFB IREFT QREFB QREFT VREF REFSENSE QINB QINA "Q" ADC Q REGISTER REFERENCE BUFFER ASYNCHRONOUS MULTIPLEXER 1V CHIP SELECT THREESTATE OUTPUT BUFFER DATA 10 BITS AVSS CLOCK DVDD DVSS "I" ADC I REGISTER AD9201 SLEEP SELECT PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD9201 is a complete dual channel, 20 MSPS, 10-bit CMOS ADC. The AD9201 is optimized specifically for applications where close matching between two ADCs is required (e.g., I/Q channels in communications applications). The 20 MHz sampling rate and wide input bandwidth will cover both narrowband and spread-spectrum channels. The AD9201 integrates two 10-bit, 20 MSPS ADCs, two input buffer amplifiers, an internal voltage reference and multiplexed digital output buffers. Each ADC incorporates a simultaneous sampling sample-andhold amplifier at its input. The analog inputs are buffered; no external input buffer op amp will be required in most applications. The ADCs are implemented using a multistage pipeline architecture that offers accurate performance and guarantees no missing codes. The outp.


2005-03-23 : 2N2857CSM    2N2880    2N2891    2N2894    2N2894    2N2894    2N2894A    2N2894ACSM    2N2894CSM    2N2894DCSM   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)