AD561 Datasheet
Part Number |
AD561 |
Manufacturers |
Analog Devices |
Logo |
|
Description |
Low Cost 10-Bit Monolithic D/A Converter |
Datasheet |
AD561 Datasheet (PDF) |
a
FEATURES Complete Current Output Converter High Stability Buried Zener Reference Laser Trimmed to High Accuracy (1/4 LSB Max Error, AD561K, T) Trimmed Output Application Resistors for 0 V to +10 V, ؎5 V Ranges Fast Settling – 250 ns to 1/2 LSB Guaranteed Monotonicity Over Full Operating Temperature Range TTL/DTL and CMOS Compatible (Positive True Logic) Single Chip Monolithic Construction Available in Chip Form MlL-STD-883-Compliant Versions Available PRODUCT DESCRIPTION
Low Cost 10-Bit Monolithic D/A Converter AD561
FUNCTIONAL BLOCK DIAGRAM TO-116
The AD561 is an integrated circuit 10-bit digital-to-analog converter combined with a high stability voltage reference fabricated on a single monolithic chip. Using ten precision highspeed current-steering switches, a control amplifier, voltage reference, and laser-trimmed thin-film SiCr resistor network, the device produces a fast, accurate analog output current. Laser trimmed output application resistors are also included to facilitate.
Part Number |
AD5697R |
Manufacturers |
Analog Devices |
Logo |
|
Description |
Dual 12-Bit nanoDAC+ |
Datasheet |
AD5697R Datasheet (PDF) |
Data Sheet
Dual, 12-Bit nanoDAC+ with 2 ppm/°C Reference, I2C Interface
AD5697R
INTERFACE LOGIC
11253-001
FEATURES
Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of full-scale range (FSR)
maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range
APPLICATIONS
Base station power amplifiers Proc.
Part Number |
AD5696R |
Manufacturers |
Analog Devices |
Logo |
|
Description |
Quad 16-/14-/12-Bit nanoDAC+ |
Datasheet |
AD5696R Datasheet (PDF) |
Data Sheet
Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/°C Reference, I2C Interface
AD5696R/AD5695R/AD5694R
FEATURES
High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range
APPLICATIONS
O.
Part Number |
AD5696 |
Manufacturers |
Analog Devices |
Logo |
|
Description |
16-/12-Bit nanoDAC+ |
Datasheet |
AD5696 Datasheet (PDF) |
INTERFACE LOGIC
10799-001
Data Sheet
FEATURES
High relative accuracy (INL): ±2 LSB maximum at 16 bits Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User-selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility 400 kHz I2C-compatible serial interface 4 I2C addresses available Low glitch: 0.5 nV-sec Low power: 1.8 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range
APPLICATIONS
Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O c.
Part Number |
AD5695R |
Manufacturers |
Analog Devices |
Logo |
|
Description |
Quad 16-/14-/12-Bit nanoDAC+ |
Datasheet |
AD5695R Datasheet (PDF) |
Data Sheet
Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/°C Reference, I2C Interface
AD5696R/AD5695R/AD5694R
FEATURES
High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range
APPLICATIONS
O.
Part Number |
AD5694R |
Manufacturers |
Analog Devices |
Logo |
|
Description |
Quad 16-/14-/12-Bit nanoDAC+ |
Datasheet |
AD5694R Datasheet (PDF) |
Data Sheet
Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/°C Reference, I2C Interface
AD5696R/AD5695R/AD5694R
FEATURES
High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range
APPLICATIONS
O.
Low Cost 10-Bit Monolithic D/A Converter
a
FEATURES Complete Current Output Converter High Stability Buried Zener Reference Laser Trimmed to High Accuracy (1/4 LSB Max Error, AD561K, T) Trimmed Output Application Resistors for 0 V to +10 V, ؎5 V Ranges Fast Settling – 250 ns to 1/2 LSB Guaranteed Monotonicity Over Full Operating Temperature Range TTL/DTL and CMOS Compatible (Positive True Logic) Single Chip Monolithic Construction Available in Chip Form MlL-STD-883-Compliant Versions Available PRODUCT DESCRIPTION
Low Cost 10-Bit Monolithic D/A Converter AD561
FUNCTIONAL BLOCK DIAGRAM TO-116
The AD561 is an integrated circuit 10-bit digital-to-analog converter combined with a high stability voltage reference fabricated on a single monolithic chip. Using ten precision highspeed current-steering switches, a control amplifier, voltage reference, and laser-trimmed thin-film SiCr resistor network, the device produces a fast, accurate analog output current. Laser trimmed output application resistors are also included to facilitate accurate, stable current-to-voltage conversion; they are trimmed to 0.1% accuracy, thus eliminating external trimmers in many situations. Several important technologies combine to make the AD561 the most accurate and most stable 10-bit DAC available. The low temperature coefficient, high stability thin-film network is trimmed at the wafer level by a fine resolution laser system to 0.01% typical linearity. This results in an accuracy specification of ± 1/4 LSB max for the K and T versions, and 1.
2005-03-23 : 2N2857CSM 2N2880 2N2891 2N2894 2N2894 2N2894 2N2894A 2N2894ACSM 2N2894CSM 2N2894DCSM