INTEGRATED CIRCUITS
74LVC11 Triple 3-input AND gate
Product specification 1998 Apr 28
Philips Semiconductors
Philips ...
INTEGRATED CIRCUITS
74LVC11 Triple 3-input AND gate
Product specification 1998 Apr 28
Philips Semiconductors
Philips Semiconductors
Product specification
Triple 3-input AND gate
74LVC11
FEATURES
Wide supply
voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A. Inputs accept
voltages up to 5.5 V
CMOS low power consumption Direct interface with TTL levels Output capability: standard ICC category: SSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB, nC to nY Input capacitance Power dissipation capacitance per gate
DESCRIPTION
The 74LVC11 is a high-performance, low power, low-
voltage Si-gate
CMOS device and superior to most advanced
CMOS compatible TTL families. The 74LVC11 provides the 3-input AND function.
CONDITIONS CL = 50 pF; VCC = 3.3 V Notes 1 and 2
TYPICAL 3.7 5.0 26
UNIT ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply
voltage in V; ȍ (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC.
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74LVC11 D 74LVC11 DB 74LVC11 PW NORTH AMERICA 74LVC11 D 74LVC11 DB 74LVC...