74LV574

INTEGRATED CIRCUITS 74LV574 Octal D-type flip-flop; positive edge-trigger (3-State) Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Jun 10 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop; positive edge-trigger (3-State) 74LV574 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0 to 3.6V Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V Typical VOLP (output ground bounce) t 0.8V at VCC = 3.3V, Typical VOHV (output VOH undershoot) u 2V at VCC = 3.3V, Common 3-State output enable input Output capability: bus driver ICC category: MSI QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr =tf v2.5 ns SYMBOL tPHL/tPLH fmax CI CPD PARAMETER Propagation delay CP to Qn Maximum clock frequency Input capacitance Power dissipation capacitance per flip-flop Tamb = 25°C Tamb = 25°C DESCRIPTION The 74LV574 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT574. The 74LV574 is an octal D-type flip–flop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the eight flip-flops is available at the outputs. Whe...