DatasheetsPDF.com

74LV4094 Datasheet

Part Number 74LV4094
Manufacturers Philips
Logo Philips
Description 8-stage shift-and-store bus register
Datasheet 74LV4094 Datasheet74LV4094 Datasheet (PDF)

INTEGRATED CIRCUITS 74LV4094 8-stage shift-and-store bus register Product specification 1998 Jun 23 Philips Semiconductors Philips Semiconductors Product specification 8-stage shift-and-store bus register 74LV4094 FEATURES • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, • Output capability: standar.

  74LV4094   74LV4094






Part Number 74LV4094
Manufacturers nexperia
Logo nexperia
Description 8-stage shift-and-store bus register
Datasheet 74LV4094 Datasheet74LV4094 Datasheet (PDF)

74LV4094 8-stage shift-and-store bus register Rev. 8 — 18 March 2021 Product data sheet 1. General description The 74LV4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transi.

  74LV4094   74LV4094







8-stage shift-and-store bus register

INTEGRATED CIRCUITS 74LV4094 8-stage shift-and-store bus register Product specification 1998 Jun 23 Philips Semiconductors Philips Semiconductors Product specification 8-stage shift-and-store bus register 74LV4094 FEATURES • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, • Output capability: standard • ICC category: MSI Applications: Tamb = 25°C Tamb = 25°C DESCRIPTION The 74LV4094 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT4094. The 74LV4094 is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input (D) to the parallel buffered 3-State outputs (QP0 to OP7). The parallel outputs may be connected directly to the common bus lines. Data is shifted on the positive-going clock (CP) transitions. The data in each shift register is transferred to the storage register when the strobe input (STR) is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of 74LV4094 devices. Data is available at QS1 on the positive-going clock edges to allow high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information is availabl.


2005-04-23 : DP100S    T510    74HCT166    74HCT173    74HCT174    74HCT175    74HCT181    74HCT182    74HCT190    74HCT191   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)