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74LV11 Datasheet

Part Number 74LV11
Manufacturers Philips
Logo Philips
Description Triple 3-input AND gate
Datasheet 74LV11 Datasheet74LV11 Datasheet (PDF)

INTEGRATED CIRCUITS 74LV11 Triple 3-input AND gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Philips Semiconductors Product specification Triple 3-input AND gate 74LV11 FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) t 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) u 2 V at VCC = 3.3 V, • Output.

  74LV11   74LV11






Part Number 74LV1T87
Manufacturers nexperia
Logo nexperia
Description 2-input single supply translating EXCLUSIVE-NOR gate
Datasheet 74LV11 Datasheet74LV1T87 Datasheet (PDF)

74LV1T87 2-input single supply translating EXCLUSIVE-NOR gate Rev. 4 — 24 February 2022 Product data sheet 1. General description The 74LV1T87 is a single, level translating 2-input EXCLUSIVE-NOR gate. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and supp.

  74LV11   74LV11







Part Number 74LV1T86
Manufacturers nexperia
Logo nexperia
Description 2-input single supply translating EXCLUSIVE-OR gate
Datasheet 74LV11 Datasheet74LV1T86 Datasheet (PDF)

74LV1T86 2-input single supply translating EXCLUSIVE-OR gate Rev. 4 — 16 August 2022 Product data sheet 1. General description The 74LV1T86 is a single, level translating 2-input Exclusive-OR gate . The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and support.

  74LV11   74LV11







Part Number 74LV1T34
Manufacturers nexperia
Logo nexperia
Description Single supply translating buffer
Datasheet 74LV11 Datasheet74LV1T34 Datasheet (PDF)

74LV1T34 Single supply translating buffer Rev. 3 — 10 February 2022 Product data sheet 1. General description The 74LV1T34 is a single, level translating buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS le.

  74LV11   74LV11







Part Number 74LV1T32
Manufacturers nexperia
Logo nexperia
Description 2-input single supply translating OR gate
Datasheet 74LV11 Datasheet74LV1T32 Datasheet (PDF)

74LV1T32 2-input single supply translating OR gate Rev. 4 — 23 February 2022 Product data sheet 1. General description The 74LV1T32 is a single, level translating 2-input OR gate. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V.

  74LV11   74LV11







Part Number 74LV1T126
Manufacturers nexperia
Logo nexperia
Description Single supply translating buffer/line driver
Datasheet 74LV11 Datasheet74LV1T126 Datasheet (PDF)

74LV1T126 Single supply translating buffer/line driver; 3-state Rev. 4 — 23 February 2022 Product data sheet 1. General description The 74LV1T126 is a single, level translating buffer/line driver with 3-state output. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The 3-state output is controlled by the output enabl.

  74LV11   74LV11







Triple 3-input AND gate

INTEGRATED CIRCUITS 74LV11 Triple 3-input AND gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Philips Semiconductors Product specification Triple 3-input AND gate 74LV11 FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) t 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) u 2 V at VCC = 3.3 V, • Output capability: standard • ICC category: SSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB, nC to nY Input capacitance Power dissipation capacitance per gate Tamb = 25°C Tamb = 25°C DESCRIPTION The 74LV11 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT11. The 74LV11 provides the 3-input AND function. CONDITIONS CL = 15 pF; VCC = 3.3 V See Notes 1 and 2 TYPICAL 10 3.5 18 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) fo) where: PD = CPD × VCC2 × fi )ȍ (CL × VCC2 fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL VCC2 fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +125°C –40°C to +125°C –40°C t.


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