74LS377

SN74LS377 Octal D Flip-Flop with Enable The SN74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. http://onsemi.com 8-Bit High Speed Parallel Registers Positive Edge-Triggered D-Type Flip Flops Fully Buffered Common Clock and Enable Inputs True and Complement Outputs Input Clamp Diodes Limit High Speed Termination Effects LOW POWER SCHOTTKY GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current – High Output Current – Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 – 0.4 8.0 Unit V °C mA mA 20 1 PLASTIC N SUFFIX CASE 738 20 1 SOIC DW SUFFIX CASE 751D ORDERING INFORMATION Device SN74LS377N SN74LS377DW Package 16 Pin DIP 16 Pin Shipping 1440 Units/Box 2500/Tape & Reel © Semiconductor Components Industries, LLC, 1999 1 December, 1999 – Rev. 6 Publication Order Number: SN74LS377/D SN74LS377 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 20 Q7 19 D7 18 D6 17 Q6 16 Q5 15 D5 14 D4 13 Q4 12 CP 11 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 E 2 Q0 3 D0 4 D1 5 Q1 6 Q2 7 D2 8 D3 9 Q3 10 GND LOADING (Note a) PIN NAMES E D0 – D3 CP Q0 – Q3 Q0 – Q3 Enable (Active LOW) Input Data Inputs Clock (Active HIGH Going Edge) Input True Outputs Complemented Outputs HIGH 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 10 U....