74HCT20

74HC20; 74HCT20 Dual 4-input NAND gate Rev. 5 — 27 March 2019 Product data sheet 1. General description The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Complies with JEDEC standard JESD7A Low-power dissipation Input levels: For 74HC20: CMOS level For 74HCT20: TTL level ESD protection: HBM JESD22-A114F exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74HC20D 74HCT20D -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm 74HC20DB 74HCT20DB -40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm 74HC20PW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT337-1 SOT402-1 4. Functional diagram 1 1A 2 1B 4 1C 5 1D 9 2A 10 2B 12 2C 13 2D 1Y 6 2Y 8 aaa-004014 Fig. 1. Functional diagram 1 1A 2 1B 4 1C 5 1D 9 2A 10 2B 12 2C 13 2D Fig. 2. Logic symbol 1Y 6 2Y 8 aaa-004015 Nexperia 1& 26 4 5 9& 10 8 12 13 aaa-004016 Fig. 3. IEC Logic symbol 5. Pinning information 5.1. Pinning 74HC20 74HCT20 1A 1 14 VCC 1B 2 13 2D n.c. 3 12 2C 1C 4 11 n.c. 1D 5 10 2B 1Y 6 9 2A GND...