74HC4020

74HC4020; 74HCT4020 14-stage binary ripple counter Rev. 6 — 3 February 2016 Product data sheet 1. General description The 74HT4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Wide supply voltage range from 2.0 V to 6.0 V  Input levels:  For 74HC4020: CMOS level  For 74HCT4020: TTL level  Multiple package options  Complies with JEDEC standard no. 7A  Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications  Frequency dividing circuits  Time delay circuits  Control counters 4. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC4020D 40 C to +125 C 74HCT4020D 74HC4020DB 40 C to +125 C 74HCT4020DB Name SO16 SSOP16 Description plastic small outline package; 16 leads; body width 3.9 mm Version SOT109-1 plastic shrink small outline package; 16 leads; body SOT338-1 width 5.3 mm NXP Semiconductors 74HC4020; 74HCT402...