74F191

74F191 Up/Down Binary Counter with Preset and Ripple Clock April 1988 Revised July 1999 74F191 Up/Down Binary Counter with Preset and Ripple Clock General Description The 74F191 is a reversible modulo-16 binary counter featuring synchronous counting and asynchronous presetting. The preset feature allows the 74F191 to be used in programmable dividers. The Count Enable input, the Terminal Count output and Ripple Clock output make possible a variety of methods of implementing multistage counters. In the counting modes, state changes are initiated by the rising edge of the clock. Features s High-Speed—125 MHz typical count frequency s Synchronous counting s Asynchronous parallel load s Cascadable Ordering Code: Order Number 74F191SC 74F191SJ 74F191PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS009495 www.fairchildsemi.com 74F191 Unit Loading/Fan Out Pin Names CE CP P0–P3 PL U/D Q0–Q3 RC TC Description Count Enable Input (Active LOW) Clock Pulse Input (Active Rising Edge) Parallel Data Inputs Asynchronous Parallel Load Input (Active LOW) Up/Down Count Control Input Fli...