74ALVCH32501

INTEGRATED CIRCUITS DATA SHEET 74ALVCH32501 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state Product specification File under Integrated Circuits, IC24 2000 Mar 16 Philips Semiconductors Product specification 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state FEATURES 3-state non-inverting outputs for bus oriented applications Wide supply voltage range of 1.2 to 3.6 V Complies with JEDEC standard no. 8-1A Current drive ±24 mA at 3.0 V Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in transparent, latched or clocked mode CMOS low power consumption Direct interface with TTL levels All inputs have bus-hold circuitry Output drive capability 50 Ω transmission lines at 85 °C Plastic fine-pitch ball grid array package. DESCRIPTION The 74ALVCH32501 is a high-performance CMOS product designed for VCC operation at 2.5 and 3.3 V with I/O compatibility up to 5 V. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH CI CI/O CPD PARAMETER propagation delay An to Bn; Bn to An input capacitance input/output capacitance power dissipation capacitance per latch VI = GND to VCC; note 1 outputs enabled outputs disabled Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where: fi = input freque...