74ALVC32
Quad 2-input OR gate
Rev. 5 — 30 April 2021
Product data sheet
1. General description
The 74ALVC32 is a quad ...
74ALVC32
Quad 2-input OR gate
Rev. 5 — 30 April 2021
Product data sheet
1. General description
The 74ALVC32 is a quad 2-input OR gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.
2. Features and benefits
Wide supply
voltage range from 1.65 V to 3.6 V 3.6 V tolerant inputs/outputs
CMOS low power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 °C to +85 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74ALVC32D
-40 °C to +85 °C
74ALVC32PW
-40 °C to +85 °C
74ALVC32BQ
-40 °C to +85 °C
Name SO14
TSSOP14
DHVQFN14
Description
plastic small outline package; 14 leads; body width 3.9 mm
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm
Version SOT108-1
SOT402-1
SOT762-1
Nexperia
4. Functional diagram
1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B
Fig. 1. Logic symbol
1Y 3 2Y 6 3Y 8 4Y 11 mna242
A
B
Fig. 3. Logic diagram (one gate)
5. Pinning information
5.1. Pinning
74ALVC32
1A 1
14 VCC
1B 2
13 4B
1Y 3
12...