74ALVC244

INTEGRATED CIRCUITS DATA SHEET 74ALVC244 Octal buffer/line driver; 3-state Product specification Supersedes data of 2003 Aug 11 2003 Sep 08 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 FEATURES Wide supply voltage range from 1.65 to 3.6 V 3.6 V tolerant inputs/outputs CMOS low power consumption Direct interface with TTL levels (2.7 to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V) ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPHL/tPLH PARAMETER propagation delay nAn to nYn DESCRIPTION The 74ALVC244 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC244 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ TYPICAL 2.7 ns ns ns ns UNIT VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 2.0 VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 2.3 VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 2.2 CI CPD Notes 1. CPD is used to determine the dynami...