Quad 2-Input exclusive-OR gate
INTEGRATED CIRCUITS
74ALS86 Quad 2-Input exclusive-OR gate
Product specification IC05 Data Handbook 1996 Jul 01
Philip...
Description
INTEGRATED CIRCUITS
74ALS86 Quad 2-Input exclusive-OR gate
Product specification IC05 Data Handbook 1996 Jul 01
Philips Semiconductors
Philips Semiconductors
Product specification
Quad 2-input exclusive-OR gate
74ALS86
DESCRIPTION
The 74ALS86 contain four independent 2-input Exclusive-OR gates. A common application is a true/complement element. If one input is held Low, the signal on the other input will be reproduced in true form at the output. If one input is held High, the signal on the other input will be reproduced inverted at the output. TYPICAL PROPAGATION DELAY 6.0ns TYPICAL SUPPLY CURRENT (TOTAL) 3.9mA
PIN CONFIGURATION
1A 1B 1Y 2A 2B 2Y 1 2 3 4 5 6 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 8 3A 3Y
TYPE 74ALS86
GND
ORDERING INFORMATION
ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 74ALS86N 74ALS86D DRAWING NUMBER SOT27-1 SOT108-1
SC00010
14-pin plastic DIP 14-pin plastic SO
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS nA, nB nY Data inputs Data outputs DESCRIPTION 74ALS (U.L.) HIGH/LOW 1.0/1.0 20/80 LOAD VALUE HIGH/LOW 20µA/0.1mA 0.4mA/8mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
1 2
=1
3
1
2
4
5
9
10
12
13 4 6
1A 1B 2A 2B 3A 3B 4A 4B
5
9 8 1Y 2Y 3Y 4Y 10
12 11 3 VCC = Pin 14 GND = Pin 7 6 8 11 13
SC00011
SC00037
LOGIC DIAGRAM
1A 1B 2A 2B 3A 3B 4A VCC = Pin 14 GND = Pin 7 4B 1 2 4 5 9 10 12 13 3 1Y
FUNCTION TABLE
INPUTS nA L L...
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