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74AHC257

NXP

Quad 2-input multiplexer

INTEGRATED CIRCUITS DATA SHEET 74AHC257; 74AHCT257 Quad 2-input multiplexer; 3-state Product specification File under I...


NXP

74AHC257

File DownloadDownload 74AHC257 Datasheet


Description
INTEGRATED CIRCUITS DATA SHEET 74AHC257; 74AHCT257 Quad 2-input multiplexer; 3-state Product specification File under Integrated Circuits, IC06 2000 Apr 03 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state FEATURES ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V Balanced propagation delays All inputs have Schmitt-trigger actions Non-inverting data path Inputs accept voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from −40 to +85 °C and −40 to +125 °C. DESCRIPTION The 74AHC/AHCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. 74AHC257; 74AHCT257 data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74AHC/AHCT257 is the logic implementation of a 4-pole 2-position switch, where the position of the switch is determined by the logic levels a...




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