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74ACTQ821 Datasheet

Part Number 74ACTQ821
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Quiet Seriesa 10-Bit D-Type Flip-Flop
Datasheet 74ACTQ821 Datasheet74ACTQ821 Datasheet (PDF)

74ACTQ821 Quiet Series™ 10-Bit D-Type Flip-Flop with 3-STATE Outputs March 1990 Revised November 1998 74ACTQ821 Quiet Series™ 10-Bit D-Type Flip-Flop with 3-STATE Outputs General Description The ACTQ821 is a 10-bit D-type flip-flop with non-inverting 3-STATE outputs arranged in a broadside pinout. The ACTQ821 utilizes Fairchild’s Quiet Series™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoo.

  74ACTQ821   74ACTQ821






Part Number 74ACTQ821
Manufacturers National Semiconductor
Logo National Semiconductor
Description Quiet Series 10-Bit D Flip-Flop
Datasheet 74ACTQ821 Datasheet74ACTQ821 Datasheet (PDF)

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  74ACTQ821   74ACTQ821







Quiet Seriesa 10-Bit D-Type Flip-Flop

74ACTQ821 Quiet Series™ 10-Bit D-Type Flip-Flop with 3-STATE Outputs March 1990 Revised November 1998 74ACTQ821 Quiet Series™ 10-Bit D-Type Flip-Flop with 3-STATE Outputs General Description The ACTQ821 is a 10-bit D-type flip-flop with non-inverting 3-STATE outputs arranged in a broadside pinout. The ACTQ821 utilizes Fairchild’s Quiet Series™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. Features s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Non-inverting 3-STATE outputs for bus interfacing s 4 kV minimum ESD immunity s Outputs source/sink 24 mA s Functionally identical to the AM29821 Ordering Code: Order Number 74ACTQ821SC 74ACTQ821SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram Pin Assignment for DIP and SOIC IEEE/IEC Pin Descriptions Pin Names D0–D9 O0–O9 OE CP Description Data Inputs Data Outputs Output Enable Input Clock Input FACT™, Quiet Series™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corpor.


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