74ACT18825

74ACT18825 18-Bit Buffer/Line Driver with 3-STATE Outputs August 1999 Revised October 1999 74ACT18825 18-Bit Buffer/Line Driver with 3-STATE Outputs General Description The ACT18825 contains eighteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 18-bit operation. Features s Broadside pinout allows for easy board layout s Separate control logic for each byte s Extra data width for wider address/data paths or buses carrying parity s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Order Number 74ACT18825SSC 74ACT18825MTD Package Number MS56A MTD56 Package Description 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names OEn I0–I17 O0–O17 Description Output Enable Input (Active LOW) Inputs Outputs FACT™, FACT Quiet Series™ and GTO™ are trademarks of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS0500292 www.fairchildsemi.com 74ACT18825 Functional Description The ACT18825 contains eighteen non-inverting buffers with 3-STATE standard outputs. The devic...