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74ACT139

Hitachi Semiconductor

Dual 1-of-4 Decoder/Demultiplexer

Data sheet acquired from Harris Semiconductor SCHS235 CD74AC139, CD74ACT139 Dual 2-to-4-Line Decoder/Demultiplexer Desc...


Hitachi Semiconductor

74ACT139

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Description
Data sheet acquired from Harris Semiconductor SCHS235 CD74AC139, CD74ACT139 Dual 2-to-4-Line Decoder/Demultiplexer Description The CD74AC139 and CD74ACT139 are dual 2-to-4-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology. These devices contain two independent binary to one-of-four decoders, each with a single active LOW enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally HIGH outputs to go LOW. If the enable input is HIGH, all four outputs remain HIGH. For demultiplexer operation, the enable input is the data input. The enable input also functions as a chip select when these devices are cascaded. September 1998 Features Buffered Inputs Typical Propagation Delay - 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF Exceeds 2kV ESD Protection MIL-STD-883, Method 3015 SCR-Latchup-Resistant CMOS Process and Circuit Design Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption Balanced Propagation Delays AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply ±24mA Output Drive Current - Fanout to 15 FAST™ ICs - Drives 50Ω Transmission Lines [ /Title (CD74 AC139 , CD74 ACT13 9) /Subject (Dual 2-to-4Line Decod er/Dem ultiplexer) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS ) /Creator () /DOCI NFO Ordering Information PART NUMBER CD74AC139E CD74ACT139E CD74AC139M96 CD74ACT139M NOTES: 1. When ordering, use the entire p...




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