D Eight Latches in a Single Package D 3-State Bus-Driving True Outputs D Full Parallel Access for Loading D Buffered Control Inputs D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
...
