DatasheetsPDF.com
74AC11112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
Description
54AC11112, 74AC11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCAS073A – JUNE 1989 – REVISED APRIL 1993 Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted
CMOS
) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C ...
Texas Instruments
Download 74AC11112 Datasheet
Similar Datasheet
@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (
Privacy Policy & Contact
)
