74AC11021

ăą Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain two independent 4-input AND gates. They perform the Boolean functions Y = A B C D or Y = A + B + C + D in positive logic. The 54AC11021 is characterized for operation over the full military temperature range of − 55°C to 125°C. The 74AC11021 is characterized for operation from −40°C to 85°C. 54AC11021, 74AC11021 DUAL 4ĆINPUT POSITIVEĆAND GATES ą SCAS005B − JULY 1987 − REVISED APRIL 1993 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE (TOP VIEW) 1B 1A 1Y GND 2Y 2D 2C 1 2 3 4 5 6 7 14 NC 13 1C 12 1D 11 VCC 10 2A 9 2B 8 NC 54AC11021 . . . FK PACKAGE (TOP VIEW) VCC 2A 3 2 1 20 19 NC 4 18 2B NC 5 17 NC 1B 6 16 NC NC 7 15 NC 1A 8 14 2C 9 10 11 12 13 NC NC GND 1D 1Y 1C 2Y 2D NC − No internal connection FUNCTION TABLE (each gate) INPUTS OUTPUT ABCD Y HHHH H LXXX L XLXX L XXLX L XXXL L EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing ...