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66AK2H14, 66AK2...
Description
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66AK2H14, 66AK2H12, 66AK2H06
SPRS866G – NOVEMBER 2012 – REVISED OCTOBER 2017
66AK2Hxx Multicore DSP+ARM® KeyStone™ II System-on-Chip (SoC)
1 Device Overview
1.1 Features
1
Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed- and FloatingPoint DSP Core – 38.4 GMacs/Core for Fixed Point @ 1.2 GHz – 19.2 GFlops/Core for Floating Point @ 1.2 GHz – Memory – 32-KB L1P Per CorePac – 32-KB L1D Per CorePac – 1024-KB Local L2 Per CorePac
ARM CorePac – Four ARM® Cortex®-A15 MPCore™ Processors at up to 1.4 GHz – 4MB of L2 Cache Memory Shared by Four ARM Cores – Full Implementation of ARMv7-A Architecture Instruction Set – 32-KB L1 Instruction and Data Caches per Core – AMBA 4.0 AXI Coherency Extension (ACE) Master Port, Connected to MSMC for LowLatency Access to Shared MSMC SRAM
Multicore Shared Memory Controller (MSMC) – 6MB of MSM SRAM Memory Shared by Eight DSP CorePacs and One ARM CorePac – Memory Protection Unit (MPU) for Both MSM SRAM and DDR3_EMIF
Multicore Navigator – 16k Multipurpose Hardware Queues With Queue Manager – Packet-Based DMA for Zero-Overhead Transfers
Network Coprocessor – Packet Accelerator Enables Support for – Transport Plane IPsec, GTP-U, SCTP, PDCP – L2 User Plane PDCP (RoHC, Air Ciphering) – 1-Gbps Wire Speed Throughput at 1.5 MPackets Per Second – Security Accelerator Engine Enables Support for – IPSe...
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