54LS138

( DataSheet : www.DataSheet4U.com ) 1-OF-8 DECODER/ DEMULTIPLEXER The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32 decoder using four LS138s and one inverter. The LS138 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. SN54/74LS138 1-OF-8 DECODER/ DEMULTIPLEXER LOW POWER SCHOTTKY Demultiplexing Capability Multiple Input Enable for Easy Expansion Typical Power Dissipation of 32 mW Active Low Mutually Exclusive Outputs Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) V CC 16 O0 15 O1 14 O2 13 O3 12 O4 11 O5 10 9 O6 J SUFFIX CERAMIC CASE 620-09 16 1 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 A0 2 A1 3 A2 4 E1 5 E2 6 E3 7 O7 8 GND 16 1 N SUFFIX PLASTIC CASE 648-08 PIN NAMES A0 – A2 E1, E2 E3 O0 – O7 Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b) LOADING (Note a) HIGH 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 16 1 D SUFFIX SOIC CASE 751B-03 ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/...