1 Megabit (128K x 8-Bit) EEPROM
VCC VSS RES OE CE WE RES A0 A6 Address Buffer and Latch Y Decoder Y Gating I/O Buffer and Input Latch Control Logic Timing High Voltage Generator I/O0 I/O7 RDY/Busy
28C011T
A7 A16
X Decoder
Memory Array
Data Latch
Memory
Logic Diagram
FEATURES:
128k x 8-bit EEPROM RAD-PAK® radiation hardened against natural space r...
