74HC00; 74HCT00
Quad 2-input NAND gate
Rev. 7 — 25 November 2015
Product data sheet
1. General description
The 74HC00; 74HCT00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels: For 74HC00: CMOS level For 74HCT00: TTL level
Complies with JEDEC standard no. 7A ESD protection:
HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC00D
40 C to +125 C
74HCT00D
74HC00DB 40 C to +125 C
74HCT00DB
74HC00PW 40 C to +125 C
74HCT00PW
74HC00BQ 40 C to +125 C
74HCT00BQ
Name SO14
SSOP14
TSSOP14
DHVQFN14
Description
plastic small outline package; 14 leads; body width 3. 9 mm
Version SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1 width 5. 3 mm
plastic thin shrink small outline package; 14 leads; body width 4. 4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; body 2. 5 3 0. 85 mm
NXP Semiconductors
4. Functional diagram
74HC00; 74HCT00
Quad 2-input NAND gate
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PQD
Fig 1. Logic symbol
PQD
Fig 2. IEC logic symbol
5. Pinning information
5. 1 Pinning
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PQD
Fig 3. Logic diagram (one gate)
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+& +&7
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DDO
Fig 4. Pin configuration SO14 and (T)SSOP14
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WHUPLQDO LQGH[DUHD
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DDO
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attac...
74HC00 PDF File
