• Double data rate architecture: two data transfers per clock cycle
• Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing dat...
HYB25DC256163CE-4 PDF File
| Part Number | HYB25DC256163CE-4 |
| Manufacturer | Qimonda |
| Title | 256-Mbit Double-Data-Rate SGRAM |
| Description | The 256-Mbit Double-Data-Rate SGRAM is a high-speed CMOS, dynamic random-access memory containing 2... |
| Features |
of the product family HYB25DC256163CE and the ordering information.
1.1 Features
• Double data rate architecture: two data transfers per clock cycle • Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing dat... |
| Published | Sep 28, 2015 |
| Datasheet |
HYB25DC256163CE-4 PDF File
|
