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NB6L56

Part Number	NB6L56
Manufacturer	ON Semiconductor
Description	2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer
Published	Sep 1, 2015
Detailed Description	NB6L56 2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer with LVPECL Outputs Multi−Level Inputs w/ Internal Te...
Datasheet	NB6L56 PDF File

Overview

NB6L56 2.
5V / 3.
3V Dual 2:1 Differential Clock / Data Multiplexer with LVPECL Outputs Multi−Level Inputs w/ Internal Termination The NB6L56 is a high performance Dual 2−to−1 Differential Clock or Data multiplexer.
The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin.
This feature allows the NB6L56 to accept various Differential logic level standards, such as LVPECL, CML or LVDS.
Outputs are 800 mV LVPECL signals.
For interface options see Figures 12 − 15.
The NB6L56 produces minimal Clock or Data jitter operating up to 2.
5 GHz or 2.
5 Gbps, respectively.
As such, the NB6L56 is ideal for SONET, GigE, Fiber Channel, Backplane and other Cl...

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