LVDS Transmitter - Chrontel
Description
Chrontel
CH7308B
CH7308B SDVO1 LVDS Transmitter
Features
1
General Description
The CH7308B is a display controller device, which accepts digital graphics input signals, upscales, encodes, and transmits data through an LVDS transmitter to a LCD panel.
This device accepts one channel of RGB data over three pairs of serial data ports.
The LVDS Transmitter includes a low jitter PLL to generate a high frequency serialized clock and all circuitry required to upscale, encode, serialize and transmit data.
The CH7308B supports a maximum pixel rate of 165MP/s.
The LVDS transmitter includes a panel fitting up-scaler and a programmable dither function to support 18-bit LCD panels.
Data is encoded into commonly used formats, including those specified in the OpenLDI and SPWG specifications.
Serialized data is outputted on three to eight differential channels.
Single/Dual LVDS Transmitter up to 165Mpixels/s Support resolutions up to 1600x1200 (1920x1200 with reduced blanking) LVDS low jitter PLL accepts spread spectrum input LVDS 18-bit and 24-bit outputs 2D dither engine Panel protection and power sequencing High-speed SDVO1 serial (1G~2Gbps) AC-coupled differential RGB inputs Low voltage interface support to graphics device Programmable power management Fully programmable through serial port Configuration through OpCodes1 Complete Windows driver support Boundary scan support Offered in a 64-pin LQFP package
Intel Proprietary
RESET* AS SPC SPD SDVO_CLK(+/-)
Serial Port/ Power Control STALL(+/-) Generator/ Power Sequencing XTAL
SC_PROM SD_PROM SC_DDC SD_DDC SDVO_STALL(+/-) ENAVDD ENABKL XI/FIN, XO
Clock Driver
SDVO_R(+/-) SDVO_G(+/-) SDVO_B(+/-)
Data Latch, Serial To Parallel
SDVO Character Decoder
Up-Scaler
LVDS PLL LVDS Encoder LVDS Serializer LVDS Driver LDC[3:0],LDC*[3:0] LL1C,LL1C* LDC[7:4],LDC*[7:4] LL2C,LL2C* VSWING
Dither
FIFO
Figure 1: Functional Block Diagram
201-0000-064
Rev.
3.
0,
05/11/2011
1
CHRONTEL
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