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SAM4CP16B

Atmel
Part Number SAM4CP16B
Manufacturer Atmel
Description SMART Power Line Communications Device
Published Aug 25, 2014
Detailed Description SAM4CP16B Atmel │SMART Power Line Communications Device DATASHEET Description The SAM4CP series belongs to Atmel® │SMART...
Datasheet PDF File SAM4CP16B PDF File

SAM4CP16B
SAM4CP16B


Overview
SAM4CP16B Atmel │SMART Power Line Communications Device DATASHEET Description The SAM4CP series belongs to Atmel® │SMART energy portfolio.
It is based on SAM4C, a high performance 32-bit, dual core ARM® Cortex®-M4 RISC processor embedding a PRIME PLC [Power Line Communication] modem.
The cores are able to operate at a maximum speed of 120 MHz, featuring 1 Mbyte of embedded Flash, 128 kBytes of SRAM and on-chip cache for each core.
SAM4CP unique dual ARM Cortex-M4 architecture supports implementation of signal processing, application and communications firmware in independent partitions.
SAM4CP16B system-on-chip includes a PRIME modem, being PRIME [PoweR line Intelligent Metering Evolution] an open standard technology used for Smart Grid applications, mainly Smart Metering.
Atmel PRIME modem implementation includes enhanced PHY layer features such as additional robust modes and frequency band extension.
The peripheral set includes advanced cryptographic engine, anti-tamper, floating point unit (FPU), 5x USARTs, 2x UARTs, 2x TWIs, 6 x SPI, as well as 1 PWM timer, 2x three channel general-purpose 16-bit timers an RTC, a 10-bit ADC, and a 46 x 5 Segmented LCD controller.
The SAM4CP series is a scalable platform providing, alongside Atmel’s industry leading SAM4 standard microcontrollers, unprecedented cost structure, performance and flexibility to smart meter designers worldwide.
It operates from 1.
62V to 3.
6V and is available in 176-pin LQFP package.
Atmel-43051K-ATPL-SAM4CP16B-Datasheet_22-Sep-16 1.
Features  Application/Master Core (CM4P0)  ARM Cortex-M4 running at up to 120 MHz(1)  Memory Protection Unit (MPU)  DSP Instruction  Thumb®-2 instruction set  Instruction and Data Cache Controller with 2 Kbytes Cache Memory  Memories  1024 Kbytes of Embedded Flash for Program Code (I-Code bus) and Program Data (D-Code bus) with Built-in ECC (2-bit error detection and 1-bit correction per 128 bits)  128 Kbytes of Embedded SRAM (SRAM0) for Program Data (System bus)...



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