64 Kbit 8Kb x8 TIMEKEEPER SRAM - ST Microelectronics
Description
M48T59 M48T59Y/M48T59V
64 Kbit (8Kb x8) TIMEKEEPER® SRAM
PRELIMINARY DATA
s
INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCY TEST OUTPUT for REAL TIME CLOCK SOFTWARE CALIBRATION AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): – M48T59: 4.
5V ≤ VPFD ≤ 4.
75V – M48T59Y: 4.
2V ≤ VPFD ≤ 4.
5V – M48T59V: 2.
7V ≤ VPFD ≤ 3.
0V
SNAPHAT (SH) Battery/Crytstal
s
s
s
28
28 1
1
SOH28 (MH)
PCDIP28 (PC) Battery/Crystal CAPHAT
s
SELF-CONTAINED BATTERY and CRYSTAL in the CAPHAT DIP PACKAGE PACKAGING INCLUDES a 28-LEAD SOIC and SNAPHAT® TOP (to be Ordered Separately) SOIC PACKAGE PROVIDES DIRECT CONNECTION for a SNAPHAT TOP which CONTAINS the BATTERY and CRYSTAL MICROPROCESSOR POWER-ON RESET (Valid even during battery back-up mode) PROGRAMMABLE ALARM OUTPUT ACTIVE in the BATTERY BACK-UP MODE BATTERY LOW FLAG
A0-A12 M48T59 M48T59Y M48T59V 13 VCC
s
Figure 1.
Logic Diagram
s
s
s
8 DQ0-DQ7
s
Table 1.
Signal Names
A0-A12 DQ0-DQ7 IRQ/FT RST E G W VCC VSS October 1999 Address Inputs Data Inputs / Outputs Interrupt / Frequency Test Output (Open Drain) Power Fail Reset Output (Open Drain) Chip Enable Output Enable Write Enable Supply Voltage Ground
W E G
IRQ/FT RST
VSS
AI01380E
1/21
This is preliminary information on a new product now in development or undergoing evaluation.
Details are subject to change without notice.
M48T59, M48T59Y, M48T59V
Figure 2A.
DIP Connections
RST A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 28 1 27 2 26 3 25 4 24 5 23 6 7 M48T59 22 8 M48T59Y 21 20 9 19 10 18 11 17 12 13 16 14 15
AI01381D
Figure 2B.
SOIC Connections
VCC W IRQ/FT A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3 RST A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 28 27 2 26 3 25 4 24 5 23 6 7 M48T59Y 22 8 M48T59V 21 20 9 19 10 18 11 17 12 16 13 15 14
AI01382E
VCC W IRQ/FT A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3
Table 2.
Absolute Maximum Ratings (1)
Symbol TA TSTG TSLD (2) VIO ...
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