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NLX1G98

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Configurable Multifunction Gate - ON Semiconductor


NLX1G98
NLX1G98

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Description
NLX1G98 Configurable Multifunction Gate The NLX1G98 MiniGatet is an advanced high-speed CMOS multifunction gate.
The device allows the user to choose logic functions MUX, AND, OR, NAND, NOR, INVERT and BUFFER.
The device has Schmitt-trigger inputs, thereby enhancing noise immunity.
The NLX1G98 input and output structures provide protection when voltages up to 7.
0 V are applied, regardless of the supply voltage.
Features http://onsemi.
com MARKING DIAGRAMS ULLGA6 1.
0 x 1.
0 CASE 613AD •ăHigh Speed: tPD = 3.
4 ns (Typ) @ VCC = 5.
0 V •ăLow Power Dissipation: ICC = 1 mA (Maximum) at TA = 25°C •ăPower Down Protection Provided on inputs •ăBalanced Propagation Delays •ăOvervoltage Tolerant (OVT) Input and Output Pins •ăUltra-Small Packages •ăThese are Pb-Free Devices M A 1 1 ULLGA6 1.
2 x 1.
0 CASE 613AE M A ULLGA6 1.
45 x 1.
0 CASE 613AF 1 A M = Specific Device Code = Date Code M A PIN ASSIGNMENTS IN B GND IN A 1 2 3 6 5 4 (Top View) IN C VCC OUT Y ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
©Ă Semiconductor Components Industries, LLC, 2008 1 March, 2008 - Rev.
0 Publication Order Number: NLX1G98/D www.
DataSheet.
in NLX1G98 IN A OUT Y IN B IN C Figure 1.
Function Diagram PIN ASSIGNMENT 1 2 3 4 5 6 IN B GND IN A OUT Y VCC IN C A L L L L H H H H FUNCTION TABLE* Input B L L H H L L H H C L H L H L H L H Output Y H H L H H L L L *To select a logic function, please refer to “Logic Configurations section”.
http://onsemi.
com 2 www.
DataSheet.
in NLX1G98 LOGIC CONFIGURATIONS VCC B Y A C A B 1 2 3 6 5 4 Y C A C Y A 1 2 3 6 5 4 Y VCC C Figure 2.
2-Input MUX with Output Inverted Figure 3.
2-Input NAND (When B = “L”) VCC VCC A C A C B Y A Y 1 2 3 6 5 4 Y B C Y C C Y B 1 2 3 6 5 4 Y C Figure 4.
2-Input NOR with Input C Inverted (When B = “H”) VCC Figure 5.
2-Input NAND with Input C Inverted (When A = “L”) VCC B C B Y 1 2 3 6 5 4 C C Y Y 1 2 3 6 5 4 C Y Figure 6.
2-Inpu...



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