P-Channel Enhancement Mode MOSFET - ACE Technology
Description
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ACE2301
Technology
Description
P-Channel Enhancement Mode MOSFET
The ACE2301 is the P-Channel logic enhancement mode power field effect transistor are produced using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and Battery powered circuits, and low in-line power loss are needed in a very small outline surface mount package.
Features
• • • • •
VDS=-20V RDS(ON),Vgs@-4.
5V,Ids@-2.
8A=100mΩ RDS(ON),Vgs@-2.
5V,Ids@-2.
0A=150mΩ Advanced trench process technology High Density Cell Design For Ultra Low On-Resistance
Absolute Maximum Ratings
Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1) Maximum Power Dissipation TA=25℃ TA=70℃ Symbol VDS VGS ID IDM PD TJ TSTG RθJA Max Unit -20 V ±12 V -2.
2 A -8 A 1.
25 W 0.
8 -55 to 150 OC -55 to 150 OC O 140 C/W
Operating Junction Temperature Storage Temperature Range Junction to Ambient Thermal Resistance (PCB mounted)2)
2 2.
1-in 2oz Cu PCB board.
Note: 1.
Repetitive Rating: Pulse width limited by the maximum junction temperature.
3.
Guaranteed by design; not subject to production testing.
VER 1.
2
1
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ACE2301
Technology
Packaging Type
SOT-23-3
3
P-Channel Enhancement Mode MOSFET
Pin Symbol Description 1 G Gate 2 S Source 3 D Drain
1 2
Ordering information
Selection Guide ACE2301 XX + H Halogen - free Pb - free BM : SOT-23-3
VER 1.
2
2
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ACE2301
Technology
Electrical Characteristics
Parameter Drain-Source Breakdown Voltage Drain-Source On-State Resistance Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Trans conductance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Inp...
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