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TSS463-AA

ATMEL Corporation
Part Number TSS463-AA
Manufacturer ATMEL Corporation
Description VAN Data Link Controller
Published Apr 27, 2007
Detailed Description Features • • • • • • • • • • • • • • • • Fully Compliant to VAN Specification ISO/11519-3 Handles All Specified Module T...
Datasheet PDF File TSS463-AA PDF File

TSS463-AA
TSS463-AA


Overview
Features • • • • • • • • • • • • • • • • Fully Compliant to VAN Specification ISO/11519-3 Handles All Specified Module Types Handles All Specified Message Types Handles Retransmission of Frames on Contention and Errors 3 Separate Line Inputs with Automatic Diagnosis and Selection Normal or Pulsed (Optical and Radio Mode) Coding VAN Transfer Rate: 1 Mbit/s Maximum SPI/SCI Interface – SPI Transfer Rate: 4 Mbit/s Maximum – SCI Transfer Rate: 125 Kbit/s Maximum Idle and Sleep Modes 128 Bytes of General-purpose RAM 14 Identifier Registers with All Bits Individually Maskable 6-source Maskable Interrupt, Including an Interrupt-on-reset to Detect Glitches on the Reset Pin Integrated Crystal or Resonator Oscillator with Internal Baud Rate Generator and Buffered Clock Output Single +5V Power Supply 0.
8 µm CMOS Technology SO16 Package VAN Data Link Controller with Serial Interface TSS463-AA Description The TSS463AA is a circuit that allows the transfer of all the status information needed in a car or truck over a single low-cost wire pair, that minimizes electrical wire usage.
It can be used to interconnect powerful functions to control and interface car body electronics (lights, wipers, power window, etc.
).
The TSS463AA is fully compliant with the VAN ISO Standard 11519-3.
This standard supports a wide range of applications such as low-cost remote-controlled switches.
Typically it is used for lamp control, complex, highly-autonomous, distributed systems, which require fast and secure data transfers.
The TSS463AA is a microprocessor-interfaced line controller for mid- to high-complexity bus-masters and listeners like dashboard controllers, car stereo or mobile telephone CPUs.
The microprocessor interface consists of a 256-byte RAM and a register area divided into 11 control registers, 14 channel register sets and 128 bytes of general purpose RAM, used as a message storage area, and a 6-source maskable interrupt.
The circuit operates in the RAM using DMA techniques, controll...



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