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.................................................................. 12 DAC Architecture—General..................................................... 12 Channel Groups.......................................................................... 12 A/ B Reigsters And Gain/Offset Adjustment.................
32-channel DAC in 56-LFCSP and 64-LQFP AD5372 Guaranteed monotonic to 16 bits AD5373 Guaranteed monotonic to 14 bits Maximum output voltage span of 4 × VREF (20 V) Nominal output voltage range of -4 V to +8 V Multiple, independent output spans available System calibration function allowing user-programmable offset and gain Channel grouping and addressing features Thermal Monitoring Function DSP/microcontroller-compatible serial interface 2.5 V to 5.5 V JEDEC-compliant digital levels DVCC VDD VSS 32-Channel, 16/14, Serial Input, Voltage-Output DACs AD5372/AD5373 Power-on reset Digital reset (R.
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