LCD Panel Timing Controller - Myson Century
Description
Century Semiconductor Inc.
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GENERAL DESCRIPTION
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CS5842 is a TFT-LCD timing controller, which is applicable to 8-bit data XGA (1024*768), SXGA (1280*1024).
CS5842 can update the response timing for display mode of XGA and SXGA automatically.
CS5842 provides a selectable polarity check function to inverse output data for EMI reducing, when the toggle number of ODD/EVEN RGB outputs is larger than 13.
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CS5842
LCD Panel Timing Controller (15")
FEATURES (continued) • Correspondent to control timing & specific resolution for different Driver IC by changing a Mask: 1.
can vary the pulse width & starting position of LP signal and POL signal polarity position changed along with LP signal 2.
can vary the pulse width & starting position of CLKV signal and tgs time • Control ASIC output timing design is based on Data Enable signals • Embedded Power On Reset circuits, Vth=2.
1V, tolerance ± 0.
3V • ESD spec.
4KV • Power On Latch Up 200mA/6.
6V • Single 3.
3V supply • 144-pin LQFP package
BLOCK DIAGRAM
DENA VD HD DCLK1 INV PNDCLK PNVD PNHD POLIN ICMD(2~1) DATAHT SXMD
HOL P
POWER ON RESET
LQD
S a e h t e
STH1/STH8 GENERATOR POL/SHC GENERATOR STV1/STV3 GENERATOR LP GENERATOR
FEATURES • Interface (5V/3.
3V[CMOS] input, 3.
3V[CMOS] output) • Single (XGA2: 65MHz)/dual (XGA: 32.
5MHz) 8-bit Data input; dual port 8-bit output; SXGA auto detective • Timing adjustable for horizontal clock output
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CLKV GENERATOR CLKH GENERATOR OUTPUT SELECTOR RGBD
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PNHMS PLMD SCMD SET TEST CLKHT
3U
GT(2~1) ODDRI(7~0) ODDGI(7~0) ODDBI(7~0) EVENRI(7~0) EVENGI(7~0) EVENBI(7~0)
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CLKV STV1 STV2 CLKH STH1 STH8 LP POL SHC RLSC
ODDGO(7~0) EVENGO(7~0)
DATA-PATH
DELAY
ODDRO(7~0) EVENRO(7~0) ODDBO(7~0) HMS1 HMS2 EVENBO(7~0)
INPUT SELECTOR
SAMPLE
POLARITY
CS5842
Century Semiconductor, Inc.
Taiwan: No.
2, Industry East Rd.
3rd, Science-Based Industrial Park, Hsin-Chu, Taiwan Tel: 886-3-5784866 Fax: 886-3-5784349
USA: 1485 Saratoga Av...
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