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TC94A04AFD

Toshiba Semiconductor

1 CHIP AUDIO DIGITAL PROCESSOR - Toshiba Semiconductor


TC94A04AFD
TC94A04AFD

PDF File TC94A04AFD PDF File



Description
TC94A04AF/AFD TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC94A04AF,TC94A04AFD 1 chip Audio Digital Processor TC94A04AF/AFD is a single-chip audio Digital Signal Processor, incorporating 4 way stereo analog switch, 2 ch AD converter, 4 ch DA converter, and electronic volume for trimming.
It is possible to realize many applications, such as sound field control -hall simulation, for example-, digital filter for equalizers, surround, base boost and something.
TC94A04AF Features • • • • • • Incorporates a 4 ch-stereo analog switch for AD converter input.
Incorporates a 1 ch stereo line-out.
Incorporates a 1 bit ∑ ∆-type AD converter (two channels).
THD: −82dB (typ.
) S/N: 95dB (typ.
) Incorporates a 1 bit ∑ ∆-type DA converter (four channels).
THD: −86dB (typ.
) S/N: 98dB (typ.
) Incorporates a trimming analog volume for each output of DA converter.
0dB to −24dB (1dB step) As digital input/output port, this has 3 input port (6 ch) and 1 output port (2 ch), enabling input/output of sampling of 96 kHz/24 bit.
Incorporates a built-in digital de-emphasis filter.
Incorporates a digital attenuator.
Weight QFP60-P-1414-0.
80D : 1.
08 g (typ.
) QFP80-P-1420-0.
80B : 1.
57 g (typ.
) TC94A04AFD • • • Incorporates a boot ROM to set a coefficient automatically, which enables to transfer an initial data from built-in ROM/RAM to registers at the time of resetting Boot ROM: 512 words The DSP block specifications are as follows: Data bus: 24 bits Multiplier/adder: 24 bits × 16 bits + 43 bits → 43 bits Accumulator: 43 bits (sign extension: 4 bits) Program ROM: 1024 words × 32 bits Coefficient RAM: 384 words × 16 bits Coefficient ROM: 256 words × 16 bits Offset RAM: 16 words × 11 bits Data RAM: 256 words × 24 bits Interface buffer RAM: 32 words × 16 bits Operation speed: 22.
5 MIPS (510 step/fs: master clock = 768 fs, fs = 44.
1 kHz) • • • • • • Note 1: At the time of an analog input, approximately 170 steps (85 step/ch) in 510 step are used for the operation of the decimation...



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