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SN74LS109A

Part Number	SN74LS109A
Manufacturer	ON Semiconductor
Description	Dual JK Positive Edge-Triggered Flip-Flop
Published	May 20, 2005
Detailed Description	SN74LS109A Dual JK Positive Edge−Triggered Flip−Flop The SN74LS109A consists of two high speed completely independent tr...
Datasheet	SN74LS109A PDF File

Overview

SN74LS109A Dual JK Positive Edge−Triggered Flip−Flop The SN74LS109A consists of two high speed completely independent transition clocked JK flip-flops.
The clocking operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
MODE SELECT − TRUTH TABLE OPERATING MODE INPUTS SD CD J OUTPUTS K Q Q Set Reset (Clear) *Undetermined Load “1” (Set) Hold Toggle Load “0” (Reset) L H X X H L H L X X L H L L X X H H H H h h H L H H l h q q H H h l q q H H l l L H * Both outputs will be HIGH while both SD and CD are LOW, but the output states are u...

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