DatasheetsPDF.com

M5M5255FP-70XL

Mitsubishi
Part Number M5M5255FP-70XL
Manufacturer Mitsubishi
Description 262 /144-BIT (32 /768-WORD BY 8-BIT) CMOS STATIC RAM
Published Apr 26, 2005
Detailed Description '97.4.7 MITSUBISHI LSIs M5M5255DP,FP -45LL,-55LL,-70LL, -45XL,-55XL,-70XL 262,144-BIT (32,768-WORD BY 8-BIT) CMOS STAT...
Datasheet PDF File M5M5255FP-70XL PDF File

M5M5255FP-70XL
M5M5255FP-70XL


Overview
'97.
4.
7 MITSUBISHI LSIs M5M5255DP,FP -45LL,-55LL,-70LL, -45XL,-55XL,-70XL 262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM DESCRIPTION The M5M5255DP,FP is 262,144-bit CMOS static RAMs organized as 32,768-words by 8-bits which is fabricated using high-performance 3 polysilicon CMOS technology.
The use of resistive load NMOS cells and CMOS periphery results in a high density and low power static RAM.
Stand-by current is small enough for battery back-up application.
It is ideal for the memory systems which require simple interface.
PIN CONFIGURATION (TOP VIEW) A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 1 2 3 4 5 6 7 8 9 10 11 12 13 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc /W A13 A8 A9 A11 S2 A10 /S1 DQ8 DQ7 DQ6 DQ5 DQ4 M5M5255DP,FP FEATURE Type Access Power supply current time Active Stand-by (max) (max) (max) 45ns 55ns 70ns 45ns 55ns 70ns 55mA (Vcc=5.
5V) DQ3 GND 14 M5M5255DP, FP-45LL M5M5255DP, FP-55LL M5M5255DP, FP-70LL M5M5255DP, FP-45XL M5M5255DP, FP-55XL M5M5255DP, FP-70XL Outline 28P4 (DP) 28P2W-C (DFP) 20µA (Vcc=5.
5V) 5µA (Vcc=5.
5V) 0.
05µA (Vcc=3.
0V, Typical) •Single +5V power supply •No clocks, no refresh •Data-Hold on +2.
0V power supply •Directly TTL compatible : all inputs and outputs •Three-state outputs : OR-tie capability •Simple memory expantion by /S1, S2 •Common Data I/O •Battery backup capability •Low stand-by current··········0.
05µA(typ.
) PACKAGE M5M255DP M5M5255DFP : 28 pin 600 mil DIP : 28 pin 450 mil SOP APPLICATION Small capacity memory units MITSUBISHI ELECTRIC 1 '97.
4.
7 MITSUBISHI LSIs M5M5255DP,FP -45LL,-55LL,-70LL, -45XL,-55XL,-70XL 262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM FUNCTION The operation mode of the M5M5255DP,FP is determined by a combination of the device control inputs /S1, S2 and /W.
Each mode is summarized in the function table.
A write cycle is executed whenever the low level /W overlaps with the low level /S1 and the high level S2.
The address must be set up before the write cycle and must be sta...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)