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IDTCSP2510C

Part Number	IDTCSP2510C
Manufacturer	Integrated Device
Description	3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
Published	Apr 17, 2005
Detailed Description	IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DEL...
Datasheet	IDTCSP2510C PDF File

Overview

IDTCSP2510C 3.
3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE 3.
3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs • Output enable bank control • External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal • No external RC network required for PLL loop stability • Operates at 3.
3V VDD • tpd Phase Error at 133MHz: < ±150ps • Jitter (peak-to-peak) at 133MHz: < ±75ps @ 133MHz • Spread Spectrum Compatible • Operating frequency 25MHz to 140MHz • Available in 24-Pin TSSOP package IDTCSP2510C APPLICATIONS: • SDRAM Mo...

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