• VDD and VDDQ: 2.5V ± 0.2V (-5, -6)
• VDD and VDDQ: 2.5V ± 0.1V (-4)
• SSTL_2 compatible I/O
• Double-data rate architecture; two data transfers per clock cycle
• Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in cap...
IS46R16320F PDF File
